By Shouri Chatterjee, K.P. Pun, Nebojša Stanic, Yannis Tsividis, Peter Kinget

This e-book tackles demanding situations for the layout of analog built-in circuits that function from ultra-low strength offer voltages (down to 0.5V). assurance demonstrates the sign processing circuit and circuit biasing techniques throughout the layout of operational transconductance amplifiers (OTAs). those amplifiers are then used to construct analog process features together with non-stop time filter out and a pattern and carry amplifier.

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Extra info for Analog Circuit Design Techniques at 0.5V (Analog Circuits and Signal Processing)

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3: Small-signal equivalent circuit of a body-input OTA stage. 2) The common-mode signal is strongly suppressed as a result of gm1 being larger than gmb1 and is intrinsically less than 1. In our design, Adiff was 24 dB per stage, and Acm was -14 dB per stage. 3) The input-referred noise is intrinsically large because the body transconductance, gmb is small in comparison to the gate transconductance, gm . By cascading two identical gain blocks, a two stage OTA is obtained as shown in Fig. 4. The amplifier is stabilized by adding Miller compensation capacitors CC with series resistors RC to move the right-half plane zero to the left-half plane.

4) has been included in Appendix A. The intrinsic transadmittance, Ygs , can now be combined with the overlap capacitance, and then transformed to extract the effective series resistance and series capacitance. 6 (c) Fig. 3: (a) Lumped model of the capacitor showing effective capacitance and series resistance. (b) Measured effective capacitance, Ceff , and (c) series resistance, Reff , as a function of VGS for different VGB . A measurement frequency of 1 MHz was used. 54 3 Weak Inversion MOS Varactors for Tunable Integrators Cgs G Coverlap Coverlap Rds Cbs B S Fig.

25 V Vamp Vamp Fig. 14: Biasing bodies of input nMOS devices to set the OTA output commonmode voltage. 4 Gain enhancement The cross-coupled pair of devices in Fig. 9, M4A , M4B , provides a negative resistance load to the first stage of the amplifier and enhances its gain. The amount of negative resistance can be controlled through the bodies of the two devices, by 4 changing their VT . 4; for a smaller gm4 , the gain is positive and for a larger gm4 , the gain appears to be negative. A closer investigation leads to the OTA DC transfer characteristics in Fig.

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